Conventionally, the SAR ADCs employ the binary search algorithms to obtain digital output codes matched with the input signal. During the conversion procedure, the digital-to-analog converter (DAC) in the SAR ADC circuit would add or subtract a binary-weighted voltage, and the difference between the input signal and the reference voltage would be less than a least significant bit (LSB) after the last bit cycle is ended. However, a large voltage might be added to an originally small voltage difference during the procedure such that the voltage difference needs to be decreased slowly and this will result in many unnecessary power losses and waste energy. Thus, an auxiliary prediction circuit having a variable window function is employed to avoid unnecessary capacitor switching to effectively decrease the power consumption of circuit, and the required extra hardware costs are also relatively low.
Keeping the drawbacks of the prior arts in mind, and employing experiments and research full-heartily and persistently, the applicant finally conceived a successive approximation analog-to-digital converter having an auxiliary prediction circuit and a method thereof.